HW 05 - PCI Bus Performance with Memory Read and Memory Read Multiple Commands (15-July-95)HW 06 - PCI Bus Performance with Memory Write and Memory Write Invalidate Commands (15-July-95)HW 07 - Disconnect/Retry (15-July-95)HW 08 - Implementing read-modify-write on PCI (15-July-95)HW 09 - Ethernet Driver Message Blocks (15-July-95)HW 10 - Interrupt Management (15-July-95)HW 11 - PCI Bus and IEEE Standards (15-July-95)HW 12 - PCI Support for the ISA Style Bracket (15-July-95)HW 13 - Developing a SCSI SIM for a PCI SCSI Controller (15-July-95)HW 14 - DMA Not Working with PCI Bus (15-July-95)HW 15 - GetDriverDiskFragment and 'ndrv' Drivers (15-July-95)HW 16 - PCI Device and Driver Matching (15-July-95)HW 17 - PCI Drivers: I/O Queue & KillIO (15-July-95)HW 18 - Getting the Processor Type and Speed on a PCI Mac (15-July-95)HW 19 - Explicitly Forcing PCI Burst Transfers (15-July-95)HW 20 - PCI Card's Assigned-Address Properties (15-July-95)HW 21 - Verifying the PCI Interface(15-July-95)HW 22 - Asserting fast-back-to-back transfers in the PCI Power Mac (15-July-95)HW 23 - Testing PCI drivers without any device (15-July-95)HW 24 - Creating a Monitors Control Panel Extension (15-July-95)HW 25 - PCI Interrupts (15-July-95)HW 26 - PCI Type 1 Cycles (15-July-95)